1. Field of the Invention
The present invention generally relates to semiconductor integrated circuit devices and, more particularly, to a semiconductor integrated circuit device equipped with a test mode selecting circuit that detects a test mode voltage applied to a predetermined external-connection terminal and which test mode voltage is higher than a normal voltage applied thereto in a normal operation mode and sets internal circuits to a test mode.
2. Description of the Prior Art
An SRAM (Static Random Access Memory) device is known having a built-in test mode selecting circuit as described above. A conventional built-in test mode selecting circuit includes a plurality of MOS transistors. The operation of the test mode selecting circuit greatly depends on the characteristics of the MOS transistors, more particularly, the threshold voltages thereof. If there is a difference in the threshold voltages between SRAM devices, the respective test mode selecting circuits will operate in different manners. If the threshold voltages of the MOS transistors deviate from the designed threshold voltages, the selecting circuit formed by these MOS transistors will malfunction. A test mode voltage, higher than a normal voltage, applied to a predetermined terminal will fail to cause the test mode selecting circuit to set the internal circuits to the test mode.